1. Field of the Invention
The present invention relates to a method of soldering a semiconductor part and a mounted structure of a semiconductor part and, more particularly, to a method of soldering a semiconductor part which cannot be passed through a reflow furnace because of a low guaranteed heat resistant temperature onto a small land and a mounted structure of a semiconductor part which is formed by this method.
2. Description of the Related Art
In general, when a part such as a semiconductor package is soldered to a circuit board, as shown in FIG. 3, a semiconductor part 1 is disposed on a land 4 for soldering and a cream solder 3 is printed on this land 4. At this time, the cream solder 3 is printed so that an electrode 2 of the semiconductor part 1 is electrically connected to the land 4. And the circuit board on which the semiconductor part 1 is thus mounted is passed through a reflow furnace to cause the cream solder 3 to be melted in order to perform soldering (refer to, for example, Patent Document 1). [Patent Document 1] Japanese Patent Laid-Open No. 10-41465
In such a reflow fabrication process, to avoid a thermal fracture of the semiconductor part 1, it is necessary that the surface temperature of this semiconductor part 1 be not more than a guaranteed heat resistant temperature. For this reason, the reflow fabrication process had the disadvantage that much ancillary work has to be performed before and after reflow, for example, it is necessary to stick a heat resistant film to the semiconductor part 1 or apply resin to the semiconductor part 1 before the circuit board is passed through the reflow furnace, it is necessary to peel the heat resistant film after the circuit board is passed through the reflow furnace, and the like.
Incidentally, a thermal fracture of the semiconductor part 1 can be avoided by lowering the heating temperature in the reflow furnace to not more than a guaranteed heat resistant temperature of the semiconductor part 1. However, in order to ensure that the cream solder 3 is positively melted, it is necessary that the temperature of the land 4 be not less than a melting temperature of the solder. Therefore, in order to eliminate insufficient heating of the cream solder, there has been proposed a method by which a through via hole which is connected to an inner layer pattern or an outer layer pattern of a circuit board is connected directly to a land and the heat of a reflow furnace is collected to the land via the through via hole (refer to, for example, Patent Document 2). [Patent Document 2] Japanese Patent Laid-Open No. 10-229273
Incidentally, in some package structures, there are packages incapable of being passed through the reflow furnace because of their low guaranteed heat resistant temperatures. In this case, a soldering fabrication process by the local heating method is effective. As such processes, there is a hand soldering fabrication process which involves performing manual soldering using a wire solder by means of a soldering iron and a laser beam fabrication process which involves performing soldering by irradiating a cream solder with focused laser beams (for example, refer to Patent Documents 3 and 4). [Patent Document 3] Japanese Patent Laid-Open No. 5-69182; [Patent Document 4] Japanese Patent Laid-Open No. 2000-299239.
However, the hand soldering fabrication process has the disadvantage that not only man-hours increase much, but also the reliability of soldering is apt to generate variations according to the ability of workers. On the other hand, in the case of the laser beam fabrication process, man-hours are relatively small and the reliability of soldering scarcely generates variations according to the ability of workers. Therefore, in quite a number of cases, soldering has been performed by the laser beam fabrication method.
In recent years, however, to meet requirements for high functional design and small size and light weight design, progress has been made in high density design of semiconductor parts and there have been an increasing number of cases where the size of lands has to be reduced because the space of a circuit substrate decreases. When a land becomes small, it becomes impossible to ensure a sufficient land space around a semiconductor part to be mounted and only the area almost on the backside of the semiconductor part can be soldered.